Senior FPGA/ASIC Verification Engineer
FPGA Verification Engineer
The successful candidate’s primary responsibility will be verification of FPGA designs for new multi-standard radio base station products for 5G, LTE, W-CDMA, and GSM networks. The position may also involve modeling, RTL design, in-system lab bring up and testing, and other typical aspects of FPGA and/or ASIC development. The Ottawa team works very closely with other Radio development teams located in Sweden and China.
• Define FPGA/ASIC verification strategies and specifications.
· Architect and implement verification environments and VIPs from scratch, and corresponding test suites, using modern verification techniques, e.g. SystemVerilog, UVM, and/or Assertion Based Verification.
• Define functional and code coverage requirements, and measure and drive closure to targets.
• Communicate and document results in verification reports.
· Collaborate with the Hardware, Software, Systems, and Integration teams, to understand requirements and specifications and drive optimal implementations with low defect rates.
· Direct the work of, and mentor, other FPGA Verification Engineers.
· Contribute to the continuous improvement of products, simulation tools and processes.
To be successful in the role you must have:
• A minimum of 8 years of experience specializing in FPGA/ASIC Verification, using modern methodologies.
• Proven ability in assessing a project and independently determining appropriate and comprehensive FPGA/ASIC verification strategies.
• Expert level knowledge of SystemVerilog, UVM/OVM, SVA, and simulators from major vendors.
• Familiarity with modern FPGA device families and tools.
• Skills with scripting languages and tools (TCL, Python, Perl, Make).
• Knowledge of high speed serial links and protocols, including PCIe, Ethernet, CPRI, and JESD204B/C.
• Knowledge of Digital Signal Processing, DSP modeling, hardware realizations, and bit-exact verification techniques.
• An analytical mindset, and be results oriented with the ability to deliver under pressure.
• Excellent English verbal and written communication skills.
- High self-motivation, an ability to work independently, while being a great teammate.
• A Bachelor’s degree in Electrical or Computer Engineering or equivalent, with demonstrated knowledge and interest in the above-mentioned required skills areas.
You might also have:
• Knowledge of wireless systems.
• Mathematical analysis skills using Matlab or similar.
• Experience in RTL design targeting FPGAs using SystemVerilog/Verilog/VHDL.
• SW Object Oriented Programming experience.